The present invention relates generally to fabrication of integrated circuit devices and specifically to methods of cleaning/seasoning reaction chambers used in the processes to fabricate integrated circuit devices.
In high temperature plasma processes, such as high-density plasma (HDP), and chemical vapor deposition (CVD) processes, the likelihood that undesirable mobile ion and metal contaminants will be driven out of the reaction chamber components increases. Therefore the chamber components and the exposed surface of the wafer chucks are seasoned, or coated, to minimize these undesirable mobile ion and metal contaminants and to also protect these parts/surfaces during the necessary cleaning processes.
HDP-CVD Processing Chamber
FIG. 1 illustrates a cross-sectional view of a typical HDP-CVD processing chamber 10. Processing chamber 10 includes chamber body 12 supporting dielectric dome 14 on its upper edge: Chamber body 12 functions as an anode and may be composed of aluminum, for example. Inductive coil 16 insulated within insulative coil holder 18, is positioned around dielectric dome 12 to provide an inductive plasma source. Conducting, or semi-conducting; chamber lid 20 is supported on the upper surface of dielectric dome 14 and functions as another anode. An electrostatic chuck 22 is positioned in the lower part of chamber 10 and supports substrate 24 during processing. Insulative dielectric material ring 26 surrounds the outer perimeter of chuck 22 to prevent arcing between chuck 22 and the grounded chamber walls. Insulative ring 26 may be comprised of a ceramic, for example.
Gases enter chamber 10 through gas inlets (not shown) positioned around the perimeter of chamber body 12 and in chamber lid 20 above chuck 22. Chamber 10 is exhausted through exhaust passage 28 outward of the outer edge of chuck 22 by an exhaust pump (not shown). A throttle and gate valve assembly control pressure within chamber 10 by controlling the exhaust of gases out of chamber 10.
An RF voltage is provided through inductive coil 16 (source RF) to generate a high density plasma (HDP). The RF voltage applied to coil 16 excite the gas introduced into chamber 10 into a plasma state. Additionally, an RF voltage may be coupled to chamber lid 20 to provide a bias RF signal into chamber 10.
Depending upon the application, precursor gases may be introduced into chamber 10 to deposit a material onto substrate 24, or etch material from substrate 24, to form integrated circuits (IC) on substrate 24.
Contaminant Material
Chamber lid 20, ceramic ring 26, dielectric dome 14, enclosure wall 12 and gas inlets form part of the plasma processing region and are sources of contaminant material which may be volatilized into the gas phase under operating conditions within chamber 10, thereby contaminating the processing environment. For example mobile ions such as Na, Li and K, and metal particles such as Fe, Cr, Ar, Ni and Mg may be leached out of chamber components 20, 26, 14, 12 when a capacitive or an inductive plasma is struck in chamber 10. Such mobile ions and/or metal particles, when incorporated into the deposited films, compromise the structural integrity and electrical performance of the devices formed on substrate 24. Also, deposits on chamber components 20, 26, 14, 12 can buildup after a series of substrates 24 have been processed that can flake off and become another source of particles that can damage the circuits.
Chamber Cleaning/Seasoning
Such particle contamination within chamber 10 is controlled by periodically cleaning chamber 10 using cleaning gases, usually fluorinated compounds and inductively and capacitively coupled plasmas. Once the chamber has been sufficiently cleaned of the process gases and the cleaning by-products have been exhausted out of chamber 10, a season step is performed to deposit a layer of material onto components 20, 26, 14, 12 of chamber 10 forming the processing region to seal the contaminants and reduce the contamination level during processing. The cleaning step is typically carried out by depositing a film to coat the interior surfaces forming the processing region.
Silane gas may be used to deposit a layer of silicon dioxide onto components 20, 26, 14, 12:
SiH4+O2xe2x86x92SiO2+2H2
Silicon tetrafluoride may likewise be used to deposit a layer of silicon oxyfluoride:
SiF4+O2xe2x86x92SiOxFy
Other season films may also be used.
For example, U.S. Pat. No. 5,811,356 to Murugesh et al and U.S. Pat. No. 6,020,035 to Gupta et al. describe seasoning processes involving fluorinated silica glass (FSG) layers.
U.S. Pat. No. 6,060,397 to Seamons et al. and U.S. Pat. No. 6,014,979 to Van Autryve et al. describe seasoning processes.
U.S. Pat. No. 5,976,900 to Qiao et al. describes a method whereby a phosphorous and/or a boron coating film is used after cleaning.
Accordingly, it is an object of the present invention to utilize a sandwich USG/FSG/USG (UFU) chamber season film regimen for high temperature chamber processing.
Another object of the present invention is to improve the particle performance of the FSG season film.
A further object of the present invention is to increase the available time of HDP FSG CVD machine (M/C) result from particle down.
Yet another object of the present invention is to maintain a minimal statistical deviation of fluorine concentration ([F]) within the FSG layer of a UFU chamber season film.
Other Objects will Appear Hereinafter
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, the chamber plasma processing region components of a processing chamber are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.